Memory controller implemented.

Tests/expected/bankBoundsTest.out

@@ -0,0 +1,4 @@
+Fault: The device on port 233 refused the access at Program Address 0x001D, and nothing is installed to deal with it.
+O
+Execution halted after 16 cycles.
+[exit 1]

Tests/expected/blitTest.out

@@ -0,0 +1,7 @@
+blitted
+....
+DE AD 
+untouched
+ABABCDEFGH
+Execution halted after 464 cycles.
+[exit 0]

Tests/expected/controllerReadTest.out

@@ -0,0 +1,5 @@
+DE AD BE EF 
+01 FF 
+00 00 
+Execution halted after 315 cycles.
+[exit 0]

Tests/expected/controllerWriteTest.out

@@ -0,0 +1,6 @@
+AA BB 
+readonly
+nobank
+done
+Execution halted after 245 cycles.
+[exit 0]

Tests/expected/fenceTest.out

@@ -0,0 +1,8 @@
+outside ok
+caught 0200
+caught 01FC
+read ok
+lowered ok
+fenced 05
+Execution halted after 535 cycles.
+[exit 0]

Tests/expected/loaderTest.out

@@ -0,0 +1,5 @@
+before
+loaded
+back
+Execution halted after 132 cycles.
+[exit 0]

Tests/expected/refusalFaultTest.out

@@ -0,0 +1,4 @@
+Fault: The device on port 17 refused the access at Program Address 0x000A, and nothing is installed to deal with it.
+O
+Execution halted after 6 cycles.
+[exit 1]

Tests/expected/refusalTest.out

@@ -0,0 +1,5 @@
+caught
+caught
+done
+Execution halted after 136 cycles.
+[exit 0]

Tests/expected/registerBankTest.out

@@ -0,0 +1,7 @@
+flags 01
+01 12 01 00 
+5A 5A 
+refused
+refused
+Execution halted after 443 cycles.
+[exit 0]

Tests/manifest

@@ -46,6 +46,33 @@ dispatchTest         | testPrograms/dispatchTest.asm      | run      | -
 # ---- Moving an ALU result back into an operand register ----
 moveQTest            | testPrograms/moveQTest.asm         | run      | -                  | -
 
+# ---- The memory controller ----
+# Reading and writing Program Memory, which the instruction set deliberately cannot do,
+# and the bank table that says what is reachable.
+controllerReadTest   | testPrograms/controllerReadTest.asm | run     | -                  | -
+controllerWriteTest  | testPrograms/controllerWriteTest.asm | run    | -                  | -
+# Block transfers: between banks, within one, overlapping, and one that is refused.
+blitTest             | testPrograms/blitTest.asm          | run      | -                  | -
+# A program that loads a program: blits code into Program Memory, installs a vector at
+# run time, and calls it. If the vector install ever silently failed, the SWI would fault
+# with "no handler" rather than printing, so this test cannot pass by accident.
+loaderTest           | testPrograms/loaderTest.asm        | run      | -                  | -
+
+# Giving a bank number to a device's memory, which is what an OS does at boot.
+registerBankTest     | testPrograms/registerBankTest.asm  | run      | -                  | -
+# The fence: raised, walked into, clipped by a blit, read through, and lowered again.
+fenceTest            | testPrograms/fenceTest.asm         | run      | -                  | -
+# Meant to fault: a bank knows how big it is.
+bankBoundsTest       | testPrograms/bankBoundsTest.asm    | run      | -                  | -
+
+# ---- A device saying no ----
+# Refusing is not interrupting: it stops the instruction that asked, rather than asking
+# for attention later. The device on port 0x11 refuses everything so this path stays
+# tested before the memory controller becomes its only real user.
+refusalTest          | testPrograms/refusalTest.asm       | run      | -                  | -
+# The same, with nothing installed to catch it. Meant to fault.
+refusalFaultTest     | testPrograms/refusalFaultTest.asm  | run      | -                  | -
+
 # ---- Asking the machine what it is made of ----
 registryTest         | testPrograms/registryTest.asm      | run      | -                  | -