From c64f09781021d2771cf85e1378f0a9753d54bc21 Mon Sep 17 00:00:00 2001 From: Anachronaut <75824887+RealBusinessAccount@users.noreply.github.com> Date: Wed, 30 Oct 2024 16:06:33 -0400 Subject: [PATCH] Added bit shift instructions. SHL and SHR treat A and B as a 16 bit circular shift register and rotates them either left or right. --- Source/Assembler/assembly.c | 2 ++ Source/Emulator/cpu.c | 16 ++++++++++++++++ SplitBit Programming Manual.md | 4 +++- 3 files changed, 21 insertions(+), 1 deletion(-) diff --git a/Source/Assembler/assembly.c b/Source/Assembler/assembly.c index b08c6d6..769c2cd 100644 --- a/Source/Assembler/assembly.c +++ b/Source/Assembler/assembly.c @@ -22,6 +22,8 @@ Instruction instruction_set[] = { {0x06, "XOR"}, {0x07, "NOTA"}, {0x08, "NOTB"}, + {0x09, "SHL"}, + {0x0A, "SHR"}, // Branch Operations: {0x10, "BRI"}, {0x11, "BRQ"}, diff --git a/Source/Emulator/cpu.c b/Source/Emulator/cpu.c index 389048e..9a877c0 100644 --- a/Source/Emulator/cpu.c +++ b/Source/Emulator/cpu.c @@ -6,6 +6,8 @@ #include "cpu.h" #include "io.h" +uint16_t shiftRegister; + void initializeCPU(CPURegisters *cpu, uint8_t *programMemory, uint8_t *dataMemory) { cpu->A = 0; cpu->B = 0; @@ -80,6 +82,20 @@ uint8_t executeOperation(uint8_t Instruction, CPURegisters *cpu) { // NOTB - not B -> Q cpu->Q = ~cpu->B; break; + case 0x09: + // SHL - Shift AB left. + shiftRegister = ((uint16_t)cpu->A << 8) | cpu->B; + shiftRegister = (shiftRegister << 1) | (shiftRegister >> 15); + cpu->A = shiftRegister >> 8; + cpu->B = shiftRegister & 0xFF; + break; + case 0x0A: + // SHR - Shift AB right. + shiftRegister = ((uint16_t)cpu->A << 8) | cpu->B; + shiftRegister = (shiftRegister >> 1) | (shiftRegister << 15); + cpu->A = shiftRegister >> 8; + cpu->B = shiftRegister & 0xFF; + break; // // 1x - Branch Operations: // diff --git a/SplitBit Programming Manual.md b/SplitBit Programming Manual.md index d10c46e..cf3bd5f 100644 --- a/SplitBit Programming Manual.md +++ b/SplitBit Programming Manual.md @@ -16,7 +16,7 @@ It has six registers: ## List of Instructions: -### Arithmetic and Logic Operations: 9 Instructions +### Arithmetic and Logic Operations: 11 Instructions Hex Code | Mnemonic | Description -- | -- | -- 00 | ADD | Adds A, B, and the Carry Flag, the result is stored in Q. @@ -28,6 +28,8 @@ Hex Code | Mnemonic | Description 06 | XOR | Bitwise xor of A and B, the result is stored in Q. 07 | NOTA | Bitwise inversion of A, the result is stored in Q. 08 | NOTB | Bitwise inversion of B, the result is stored in Q. +09 | SHL | A and B form a circular shift register. Rotate this register left. +0A | SHR | A and B form a circular shift register. Rotate this register right. ### Branch Operations: 7 Instructions Hex Code | Mnemonic | Description