Move the opcode map: nothing in 0x0X, and room for a return variant

Three blocks move and nothing else changes. Branches take 0x60, subroutines
take 0x70, and the ALU moves up into the 0x10 block the two of them used to
share. Order within each block is preserved exactly - this relocates them,
it does not rethink them.

WHAT IT BUYS IS AN EMPTY 0x00 TO 0x0F. Program Memory that was never
written, or a load that stopped part way and left zeroes in its tail, used
to read as a long run of ADDs: the machine carried on through them, arrived
somewhere unpredictable, and whatever broke there was a long way from the
byte that caused it. Now it faults where it is met:

  Fault: 0x00 at Program Address 0x0004 is not an instruction.

That is the address of the byte after the last real instruction, which is
the difference between a diagnosis and a search. Reserving the whole nibble
rather than just 0x00 means a run into blank memory faults wherever it
starts rather than only when it lands on the right byte. runOffTest records
it, and the block is left empty for whatever turns out to want it.

The other half is room: branches and subroutines had filled 0x10 to 0x1F
between them, so a service return that keeps Q and DP3 had nowhere to sit
next to its family. It has 0x76 waiting now.

Five places wrote an opcode down that the scripted remap did not reach, and
four of them were found by tests rather than by looking:

- secondPass.c lists which opcodes take an address, and firstPass.c knows
  SWI by number. Missing those made XOR read as a branch.
- Asm.asm knows SWI by number too, being the other assembler. Missing it
  made the native and host assemblers disagree byte for byte, which is
  exactly the check that exists to catch a thing known in two places.
- loaderTest.asm carries a hand written payload, and its RETI was 0x19. To
  the assembler those are numbers and to the program they are data, so
  nothing but running it could notice. It says so in a comment now.
- The Assembler Manual prints the bytes hello.asm assembles to, and two of
  them were branches.

The monitor's recorded disassembly moved by exactly the bytes it should:
18 became 72 wherever SWI appears, with SETD and INIB untouched and every
disassembled line still reading the same.

Source/Assembler/secondPass.c

@@ -512,17 +512,17 @@ static void checkOperands(intermediateElement *intermediateArray, int arraySize,
     const char *problem = NULL;
 
     // Listed rather than matched on the high nibble, because not every instruction in
-    // the branch block takes an address: RET has none, and BRD gets its destination
-    // from a Data Pointer instead of from the program.
-    if (opcode == 0x10 || opcode == 0x11 || opcode == 0x12 ||
-        opcode == 0x13 || opcode == 0x14 || opcode == 0x17 ||
-        opcode == 0x1A || opcode == 0x1B || opcode == 0x1C || opcode == 0x1D) {
+    // these two blocks takes an address: RET has none, and BRD gets its destination from
+    // a Data Pointer instead of from the program.
+    if (opcode == 0x60 || opcode == 0x61 || opcode == 0x62 ||
+        opcode == 0x63 || opcode == 0x64 || opcode == 0x71 ||
+        opcode == 0x66 || opcode == 0x67 || opcode == 0x68 || opcode == 0x69) {
         // Branches and CALL take a two byte address, which only a label can supply.
         if (nextType != LABEL) problem = "Branch without label.";
     } else if ((opcode & 0xF0) == 0xD0 || (opcode & 0xF0) == 0xE0) {
         // The instruction is either an input or output and must be followed by a value.
         if (nextType != VALUE) problem = "I/O without destination port.";
-    } else if (opcode == 0x18) {
+    } else if (opcode == 0x72) {
         // SWI names a vector, either by the name it was given in the Vector Segment or,
         // rarely, as a literal number. Without one it swallows whatever follows it and
         // every address after that shifts.