AnachronautandClaude Opus 5
b6004bdcde
"Binary" was doing three jobs. It meant an SPBT file that the machine starts from; it meant whatever the assembler happened to produce, which is now either that or a loadable program; and it meant a compiled host tool. A word that means three things means none of them, and the first of the three has a name already - this project has been calling them boot images for a while and the manuals had not caught up. Where it means an SPBT file -> boot image Where it means either output -> output Where it means a host executable -> left alone Where it means base two -> left alone The user facing messages move with it: Error: No boot image specified. Usage: ./SplitBit [OPTIONS] <boot image> Error: This is not a SplitBit boot image. Error: This boot image is in format version 2, and this emulator reads 1. Successfully wrote SplitBit boot image to "hello.bin". The assembler's own help was the interesting case. Its -o writes either format, so "the binary" there was never right - it is "the output" now, and the message that names the format is the one that says which it wrote. No recorded output contained the word, so nothing needed re-blessing. Checked before starting rather than after. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01E2JrLzFvuFX9fgi1LDRjrW
729 lines
29 KiB
C
729 lines
29 KiB
C
// cpu.c
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// SplitBit CPU Emulator Core
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// Written by Anachronaut
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// 10/16/2024
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#include "cpu.h"
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#include "io.h"
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#include "../Assembler/assembly.h" // For the vector table layout, which both tools share.
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uint16_t shiftRegister;
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// Reads one entry out of a vector table. Most significant byte first, matching the
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// branch instructions and both file formats.
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static uint16_t readVector(const uint8_t *programMemory, uint16_t base, uint8_t index) {
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uint16_t address = base + (uint16_t)index * VECTOR_ENTRY_BYTES;
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return ((uint16_t)programMemory[address] << 8) | (uint16_t)programMemory[address + 1];
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}
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// Builds an interrupt frame and dispatches through a vector. The resume address is the
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// address execution should carry on from once the handler returns, and it goes into the
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// frame as a real address so that a handler can read it and make sense of it.
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//
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// Returns 0 if it dispatched. If the vector is empty there is nothing to dispatch to, so
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// it raises a fault and returns 1 rather than jumping to the bottom of Program Memory
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// and running whatever happens to be there.
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//
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// Note that a zero entry means "no handler" to everything that dispatches, including the
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// two entries the CPU treats as start addresses when it reads them at reset. The
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// exemption belongs to that one read, not to the entries themselves.
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static uint8_t enterInterrupt(CPURegisters *cpu, uint16_t base, uint8_t index, uint16_t resumeAddress) {
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uint16_t handler = readVector(cpu->Program, base, index);
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if (handler == 0x0000) {
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cpu->Fault = FAULT_NO_HANDLER;
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cpu->FaultVector = index;
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cpu->Status |= STATUS_FAULT;
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cpu->Status |= STATUS_HALT;
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return 1;
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}
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// Order mirrors genericCall exactly: low byte then high byte, lowest numbered Data
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// Pointer first, so that anything walking the Stack sees a familiar shape.
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cpu->Data[cpu->StackPointer] = resumeAddress & 0xFF;
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cpu->StackPointer--;
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cpu->Data[cpu->StackPointer] = (resumeAddress >> 8) & 0xFF;
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cpu->StackPointer--;
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for (int i = 0; i < DATA_POINTERS; i++) {
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cpu->Data[cpu->StackPointer] = cpu->DataPointer[i] & 0xFF;
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cpu->StackPointer--;
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cpu->Data[cpu->StackPointer] = (cpu->DataPointer[i] >> 8) & 0xFF;
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cpu->StackPointer--;
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}
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cpu->Data[cpu->StackPointer] = cpu->B;
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cpu->StackPointer--;
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cpu->Data[cpu->StackPointer] = cpu->A;
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cpu->StackPointer--;
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cpu->Data[cpu->StackPointer] = cpu->Q;
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cpu->StackPointer--;
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cpu->Data[cpu->StackPointer] = cpu->Status;
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cpu->StackPointer--;
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// A handler runs with hardware interrupts held off unless it says otherwise, so an
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// interrupt cannot arrive inside the handler for another one and grow the Stack
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// without bound. The old setting rode into the frame inside the Status register, so
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// RETI puts it back without anything having to remember it separately.
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cpu->Status &= ~STATUS_INTERRUPT;
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// The Program Counter is stepped after every instruction, so land one short of the
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// handler and let that step land on its first byte. genericBranch does the same.
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cpu->ProgramCounter = handler - 1;
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return 0;
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}
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// A device that refused what it was asked stops the machine where it stands, rather than
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// raising a line and letting execution carry on past the mistake. The frame carries the
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// address of the instruction that asked, so a handler can see which one it was, and so a
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// bare RETI meets it again the way every other fault on this machine does.
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//
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// Returns 1 if the machine has stopped because nothing was installed to catch it.
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static uint8_t answerRefusal(CPURegisters *cpu, uint16_t site) {
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uint8_t refusal = takeRefusal();
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if (refusal == 0) {
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return 0;
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}
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if (enterInterrupt(cpu, SOFTWARE_VECTOR_BASE, refusal, site)) {
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cpu->Fault = FAULT_DEVICE_REFUSED;
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cpu->FaultVector = refusingPort();
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cpu->ProgramCounter = site - 1;
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}
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return 0;
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}
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void initializeCPU(CPURegisters *cpu, uint8_t *programMemory, uint8_t *dataMemory) {
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cpu->A = 0;
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cpu->B = 0;
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cpu->Q = 0;
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cpu->Status = 0;
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// Execution begins wherever the boot vector points. It is a start address rather
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// than a handler, so a zero there is not "nothing installed" but the address
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// 0x0000, which is where a program carrying no vector table of its own begins.
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// That is what lets everything written before the table existed still run.
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cpu->ProgramCounter = readVector(programMemory, SOFTWARE_VECTOR_BASE, VECTOR_BOOT);
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// Every Data Pointer starts at the bottom of Data Memory.
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for (int i = 0; i < DATA_POINTERS; i++) {
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cpu->DataPointer[i] = 0x0000;
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}
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cpu->StackPointer = 0xFFFF;
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cpu->Program = programMemory;
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cpu->Data = dataMemory;
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cpu->Fault = FAULT_NONE;
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cpu->FaultVector = 0;
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}
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void genericBranch(CPURegisters *cpu){
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// Load the next two bytes from program memory into the Program Counter.
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// Byte order is imporant. Most Significant first, then Least Significant.
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cpu->ProgramCounter++; // Move to the next byte. (MSB)
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uint16_t DestinationAddress;
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DestinationAddress = (uint16_t)cpu->Program[cpu->ProgramCounter] << 8; // Cast the 8 bit value to a 16 bit value and shifts it up to the high byte.
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cpu->ProgramCounter++; // Move to the next byte. (LSB)
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DestinationAddress = DestinationAddress | (uint16_t)cpu->Program[cpu->ProgramCounter]; // Cast the 8 bit value to a 16 bit value and or it to add it to the desination.
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cpu->ProgramCounter = DestinationAddress-1;
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}
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void genericCall(CPURegisters *cpu){
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// Order, low byte, high byte
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cpu->Data[cpu->StackPointer] = cpu->ProgramCounter & 0xFF;
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cpu->StackPointer--;
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cpu->Data[cpu->StackPointer] = (cpu->ProgramCounter >> 8) & 0xFF;
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cpu->StackPointer--;
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// Push the preserved Data Pointers to the Stack, lowest numbered first.
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// Order within each one, low byte, high byte.
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// The pointers above PRESERVED_DATA_POINTERS are deliberately left alone, so a
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// subroutine can use one to hand an address back to whoever called it.
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for (int i = 0; i < PRESERVED_DATA_POINTERS; i++) {
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cpu->Data[cpu->StackPointer] = cpu->DataPointer[i] & 0xFF;
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cpu->StackPointer--;
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cpu->Data[cpu->StackPointer] = (cpu->DataPointer[i] >> 8) & 0xFF;
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cpu->StackPointer--;
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}
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// Push B to the Stack.
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cpu->Data[cpu->StackPointer] = cpu->B;
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cpu->StackPointer--;
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// Push A to the Stack.
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cpu->Data[cpu->StackPointer] = cpu->A;
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cpu->StackPointer--;
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// Perform a Generic Branch to the Address.
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genericBranch(cpu);
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}
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uint16_t *selectDataPointer(CPURegisters *cpu) {
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// Every instruction that works through a Data Pointer names which one in the
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// byte immediately after the opcode. Out of range selectors are masked down
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// rather than rejected, the way a narrow field in hardware would be. It is the
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// assembler's job to refuse to emit one in the first place.
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cpu->ProgramCounter++;
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return &cpu->DataPointer[cpu->Program[cpu->ProgramCounter] & (DATA_POINTERS - 1)];
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}
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uint8_t executeOperation(uint8_t Instruction, CPURegisters *cpu) {
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// ADD and SUB share this. It is declared here rather than after a case label
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// because a label may only be followed by a statement in ISO C, and a
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// declaration is not one.
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uint16_t result;
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switch(Instruction) {
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// 0x - Arithmetic and Logic Operations.
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case 0x00:
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// ADD - A + B + Carry -> Q
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result = (uint16_t)cpu->A + (uint16_t)cpu->B + (cpu->Status & STATUS_CARRY);
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if (result > 255) {
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cpu->Status |= STATUS_CARRY;
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} else {
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cpu->Status &= ~STATUS_CARRY;
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}
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cpu->Q = result & 0xFF;
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break;
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case 0x01:
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// SUB - A - B - Carry -> Q
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result = (uint16_t)cpu->A - (uint16_t)cpu->B - (cpu->Status & STATUS_CARRY);
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if (result > 255) {
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cpu->Status |= STATUS_CARRY;
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} else {
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cpu->Status &= ~STATUS_CARRY;
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}
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cpu->Q = result & 0xFF;
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break;
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case 0x02:
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// AND - A and B -> Q
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cpu->Q = cpu->A&cpu->B;
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break;
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case 0x03:
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// OR - A or B -> Q
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cpu->Q = cpu->A|cpu->B;
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break;
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case 0x04:
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// XOR - A xor B -> Q
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cpu->Q = cpu->A^cpu->B;
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break;
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case 0x05:
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// NOTA - not A -> Q
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cpu->Q = ~cpu->A;
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break;
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case 0x06:
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// NOTB - not B -> Q
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cpu->Q = ~cpu->B;
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break;
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case 0x07:
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// SHL - Shift AB left.
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shiftRegister = ((uint16_t)cpu->A << 8) | cpu->B;
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shiftRegister = (shiftRegister << 1) | (shiftRegister >> 15);
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cpu->A = shiftRegister >> 8;
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cpu->B = shiftRegister & 0xFF;
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break;
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case 0x08:
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// SHR - Shift AB right.
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shiftRegister = ((uint16_t)cpu->A << 8) | cpu->B;
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shiftRegister = (shiftRegister >> 1) | (shiftRegister << 15);
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cpu->A = shiftRegister >> 8;
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cpu->B = shiftRegister & 0xFF;
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break;
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//
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// 1x - Branch Operations:
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//
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case 0x10:
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// BRI - Branch Immediately
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genericBranch(cpu);
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break;
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case 0x11:
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// BRQ - Branch if Q = 0
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if(cpu->Q == 0) {
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genericBranch(cpu);
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} else {
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cpu->ProgramCounter+=2;
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}
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break;
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case 0x12:
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// BRA - Branch if A = 0
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if(cpu->A == 0) {
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genericBranch(cpu);
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} else {
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cpu->ProgramCounter+=2;
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}
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break;
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case 0x13:
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// BRB - if B = 0
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if(cpu->B == 0) {
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genericBranch(cpu);
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} else {
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cpu->ProgramCounter+=2;
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}
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break;
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case 0x14:
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// BRC - Do an immediate branch if the Carry Flag is set.
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if (cpu->Status & STATUS_CARRY) {
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genericBranch(cpu);
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} else {
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cpu->ProgramCounter+=2;
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}
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break;
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case 0x15: {
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// BRD - Branch to the address held in a Data Pointer.
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// This is the only branch whose destination is not written into the
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// program, which is what makes a table of addresses something a program
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// can dispatch through rather than only read.
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uint16_t destination = *selectDataPointer(cpu);
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// stepCPU adds one after every instruction, so aim one short.
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cpu->ProgramCounter = destination - 1;
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}
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break;
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case 0x17:
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// CALL - Push the Program Counter to the Stack, and perform an immediate branch.
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genericCall(cpu);
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break;
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case 0x1A:
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// BNQ - Branch if Q is not 0.
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if(cpu->Q != 0) {
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genericBranch(cpu);
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} else {
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cpu->ProgramCounter+=2;
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}
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break;
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case 0x1B:
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// BNA - Branch if A is not 0.
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if(cpu->A != 0) {
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genericBranch(cpu);
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} else {
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cpu->ProgramCounter+=2;
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}
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break;
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case 0x1C:
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// BNB - Branch if B is not 0.
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if(cpu->B != 0) {
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genericBranch(cpu);
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} else {
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cpu->ProgramCounter+=2;
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}
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break;
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case 0x1D:
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// BNC - Branch if the Carry Flag is clear.
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if (!(cpu->Status & STATUS_CARRY)) {
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genericBranch(cpu);
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} else {
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cpu->ProgramCounter+=2;
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}
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break;
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case 0x18: {
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// SWI - Software Interrupt. The byte after the opcode names the vector.
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// Never masked: this is an instruction the program deliberately ran, not
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// something a device asked for.
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uint16_t site = cpu->ProgramCounter;
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cpu->ProgramCounter++;
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uint8_t vector = cpu->Program[cpu->ProgramCounter];
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// Execution resumes after the operand, which the Program Counter is sitting
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// on, so the resume address is one further on than that.
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if (enterInterrupt(cpu, SOFTWARE_VECTOR_BASE, vector, cpu->ProgramCounter + 1)) {
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// No handler. Leave the Program Counter on the SWI itself rather than
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// its operand, so the report names the instruction that failed.
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cpu->ProgramCounter = site - 1;
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}
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} break;
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case 0x19: {
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// RETI - Return from an interrupt. Pops the frame in the exact reverse of
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// the order enterInterrupt pushed it.
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cpu->StackPointer++;
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cpu->Status = cpu->Data[cpu->StackPointer];
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cpu->StackPointer++;
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cpu->Q = cpu->Data[cpu->StackPointer];
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cpu->StackPointer++;
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cpu->A = cpu->Data[cpu->StackPointer];
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cpu->StackPointer++;
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cpu->B = cpu->Data[cpu->StackPointer];
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for (int i = DATA_POINTERS - 1; i >= 0; i--) {
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cpu->StackPointer++;
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cpu->DataPointer[i] = (uint16_t)cpu->Data[cpu->StackPointer] << 8;
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cpu->StackPointer++;
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cpu->DataPointer[i] |= (uint16_t)cpu->Data[cpu->StackPointer];
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}
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uint16_t resumeAddress;
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cpu->StackPointer++;
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resumeAddress = (uint16_t)cpu->Data[cpu->StackPointer] << 8;
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cpu->StackPointer++;
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resumeAddress = resumeAddress | (uint16_t)cpu->Data[cpu->StackPointer];
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// The frame holds the address to carry on from. The Program Counter is
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// stepped after every instruction, so land one short of it. RET does the
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// same job with its +2, for the same reason.
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cpu->ProgramCounter = resumeAddress - 1;
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} break;
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case 0x1F:
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// RET - Return from subroutine, restore the registers and set the Program Counter to the Return Address.
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// Pop A from the Stack.
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cpu->StackPointer++;
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cpu->A = cpu->Data[cpu->StackPointer];
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// Pop B from the Stack.
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cpu->StackPointer++;
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cpu->B = cpu->Data[cpu->StackPointer];
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// Pop the preserved Data Pointers from the Stack. This walks the pointers
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// in the opposite order to genericCall, and takes the high byte before the
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// low byte, so that it exactly mirrors the way they were pushed.
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for (int i = PRESERVED_DATA_POINTERS - 1; i >= 0; i--) {
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cpu->StackPointer++;
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cpu->DataPointer[i] = (uint16_t)cpu->Data[cpu->StackPointer] << 8;
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cpu->StackPointer++;
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cpu->DataPointer[i] |= (uint16_t)cpu->Data[cpu->StackPointer];
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}
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// Pop the Return Address from the Stack.
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cpu->StackPointer++;
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cpu->ProgramCounter = (uint16_t)cpu->Data[cpu->StackPointer] << 8;
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cpu->StackPointer++;
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cpu->ProgramCounter = cpu->ProgramCounter | (uint16_t)cpu->Data[cpu->StackPointer];
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// Add 2 to the Program Counter to skip over the address when it returns.
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cpu->ProgramCounter += 2;
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break;
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//
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// 2x - Register Operations:
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//
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case 0x20:
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// RSTA - Reset A to 0.
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cpu->A = 0;
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break;
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case 0x21:
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// RSTB - Reset B to 0.
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cpu->B = 0;
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break;
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case 0x22:
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// INCA - Add 1 to A.
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// Set the Carry Flag if the register overflows.
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if (cpu->A == 0xFF) {
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cpu->Status |= STATUS_CARRY;
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} else {
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cpu->Status &= ~STATUS_CARRY;
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}
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cpu->A++;
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break;
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case 0x23:
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// INCB - Add 1 to B.
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// Set the Carry Flag if the register overflows.
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if (cpu->B == 0xFF) {
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cpu->Status |= STATUS_CARRY;
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} else {
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cpu->Status &= ~STATUS_CARRY;
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}
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cpu->B++;
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break;
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case 0x24:
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// DECA - Subtract 1 from A.
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// Set the Carry Flag if the register underflows.
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if (cpu->A == 0x00) {
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cpu->Status |= STATUS_CARRY;
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} else {
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cpu->Status &= ~STATUS_CARRY;
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}
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cpu->A--;
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break;
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case 0x25:
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// DECB - Subtract 1 from B.
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// Set the Carry Flag if the register underflows.
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if (cpu->B == 0x00) {
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cpu->Status |= STATUS_CARRY;
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} else {
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cpu->Status &= ~STATUS_CARRY;
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}
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cpu->B--;
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break;
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case 0x26:
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// INIA - Initialize A Immediately from Program Memory.
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cpu->ProgramCounter++;
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cpu->A = cpu->Program[cpu->ProgramCounter];
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break;
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case 0x27:
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// INIB - Initialize A Immediately from Program Memory.
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cpu->ProgramCounter++;
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cpu->B = cpu->Program[cpu->ProgramCounter];
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break;
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case 0x28:
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// CCF - Clear the Carry Flag.
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cpu->Status &= ~STATUS_CARRY;
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break;
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case 0x29:
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// MVQA - Copy Q into A.
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cpu->A = cpu->Q;
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break;
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case 0x2A:
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// MVQB - Copy Q into B.
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cpu->B = cpu->Q;
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break;
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case 0x2B:
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// SIF - Set the Interrupt Flag, enabling hardware interrupts.
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cpu->Status |= STATUS_INTERRUPT;
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break;
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case 0x2C:
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// CIF - Clear the Interrupt Flag, disabling hardware interrupts.
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// Software interrupts and faults are delivered either way, so this
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// only ever holds off a device.
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cpu->Status &= ~STATUS_INTERRUPT;
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break;
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//
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// 3x - Stack Operations:
|
|
//
|
|
case 0x30:
|
|
// PSHQ - Push Q to the Stack.
|
|
cpu->Data[cpu->StackPointer] = cpu->Q;
|
|
cpu->StackPointer--;
|
|
break;
|
|
case 0x31:
|
|
// PSHA - Push A to the Stack.
|
|
cpu->Data[cpu->StackPointer] = cpu->A;
|
|
cpu->StackPointer--;
|
|
break;
|
|
case 0x32:
|
|
// PSHB - Push B to the Stack.
|
|
cpu->Data[cpu->StackPointer] = cpu->B;
|
|
cpu->StackPointer--;
|
|
break;
|
|
case 0x33: {
|
|
// PSHD - Push the selected Data Pointer Address to the Stack.
|
|
// Order, high byte, low byte
|
|
// This ordering makes it easier to add offsets with register math.
|
|
uint16_t pushed = *selectDataPointer(cpu);
|
|
cpu->Data[cpu->StackPointer] = (pushed >> 8) & 0xFF;
|
|
cpu->StackPointer--;
|
|
cpu->Data[cpu->StackPointer] = pushed & 0xFF;
|
|
cpu->StackPointer--;
|
|
}
|
|
break;
|
|
case 0x34:
|
|
// POPA - Pop A from the Stack.
|
|
cpu->StackPointer++;
|
|
cpu->A = cpu->Data[cpu->StackPointer];
|
|
|
|
break;
|
|
case 0x35:
|
|
// POPB - Pop B from the Stack.
|
|
cpu->StackPointer++;
|
|
cpu->B = cpu->Data[cpu->StackPointer];
|
|
break;
|
|
case 0x36: {
|
|
// POPD - Pop a Data Address from the Stack into the selected Data Pointer.
|
|
uint16_t *popped = selectDataPointer(cpu);
|
|
cpu->StackPointer++;
|
|
*popped = (uint16_t)cpu->Data[cpu->StackPointer];
|
|
cpu->StackPointer++;
|
|
*popped |= (uint16_t)cpu->Data[cpu->StackPointer] << 8;
|
|
}
|
|
break;
|
|
//
|
|
// 4x - Data Operations:
|
|
//
|
|
case 0x40:
|
|
// INCD - Increment the selected Data Pointer.
|
|
(*selectDataPointer(cpu))++;
|
|
break;
|
|
case 0x41:
|
|
// DECD - Decrement the selected Data Pointer.
|
|
(*selectDataPointer(cpu))--;
|
|
break;
|
|
case 0x42:
|
|
// LDA - Load A from Data.
|
|
cpu->A = cpu->Data[*selectDataPointer(cpu)];
|
|
break;
|
|
case 0x43:
|
|
// LDB - Load B from Data.
|
|
cpu->B = cpu->Data[*selectDataPointer(cpu)];
|
|
break;
|
|
case 0x44:
|
|
// STQ - Store Q into Data.
|
|
cpu->Data[*selectDataPointer(cpu)] = cpu->Q;
|
|
break;
|
|
case 0x45:
|
|
// STA - Store A into Data.
|
|
cpu->Data[*selectDataPointer(cpu)] = cpu->A;
|
|
break;
|
|
case 0x46:
|
|
// STB - Store B into Data.
|
|
cpu->Data[*selectDataPointer(cpu)] = cpu->B;
|
|
break;
|
|
case 0x47: {
|
|
// SETD - Set the selected Data Pointer.
|
|
uint16_t *destination = selectDataPointer(cpu);
|
|
cpu->ProgramCounter++;
|
|
uint16_t Address;
|
|
Address = (uint16_t)cpu->Program[cpu->ProgramCounter] << 8; // Cast the 8 bits to a 16 bit value and shift them to the high byte.
|
|
cpu->ProgramCounter++;
|
|
Address |= (uint16_t)cpu->Program[cpu->ProgramCounter];
|
|
*destination = Address;
|
|
}
|
|
break;
|
|
case 0x48: {
|
|
// DPUP - Offset the selected Data Pointer up by the value of the next byte of Program Memory.
|
|
uint16_t *target = selectDataPointer(cpu);
|
|
cpu->ProgramCounter++;
|
|
*target += cpu->Program[cpu->ProgramCounter];
|
|
}
|
|
break;
|
|
case 0x49: {
|
|
// DPDN - Offset the selected Data Pointer down by the value of the next byte of Program Memory.
|
|
uint16_t *target = selectDataPointer(cpu);
|
|
cpu->ProgramCounter++;
|
|
*target -= cpu->Program[cpu->ProgramCounter];
|
|
}
|
|
break;
|
|
case 0x4A: {
|
|
// LDD - Load the first Data Pointer from the two bytes of Data Memory
|
|
// addressed by the second. Byte order matches everywhere else an address
|
|
// is stored: most significant first, then least significant.
|
|
// The source is taken by value before anything is written, so LDD.0.0
|
|
// follows the pointer in DP0 rather than tripping over itself.
|
|
uint16_t *destination = selectDataPointer(cpu);
|
|
uint16_t source = *selectDataPointer(cpu);
|
|
*destination = (uint16_t)cpu->Data[source] << 8;
|
|
*destination |= (uint16_t)cpu->Data[(uint16_t)(source + 1)];
|
|
}
|
|
break;
|
|
case 0x4B: {
|
|
// STD - Store the first Data Pointer into the two bytes of Data Memory
|
|
// addressed by the second. The cast on the second address keeps it inside
|
|
// Data Memory when the pointer sits at the very top of it.
|
|
uint16_t value = *selectDataPointer(cpu);
|
|
uint16_t address = *selectDataPointer(cpu);
|
|
cpu->Data[address] = (value >> 8) & 0xFF;
|
|
cpu->Data[(uint16_t)(address + 1)] = value & 0xFF;
|
|
}
|
|
break;
|
|
case 0x4C: {
|
|
// MVSD - Copy the Stack Pointer into the selected Data Pointer.
|
|
//
|
|
// The Stack Pointer still cannot be written, so this does not let a program
|
|
// move the Stack. It lets a program find it, which is what reading anything
|
|
// already on the Stack requires. An interrupt handler needs this to reach
|
|
// its own frame, and so does anything that wants to walk back through the
|
|
// calls that led to where it is.
|
|
uint16_t *target = selectDataPointer(cpu);
|
|
*target = cpu->StackPointer;
|
|
}
|
|
break;
|
|
case 0x4D: {
|
|
// MVDS - Copy the selected Data Pointer into the Stack Pointer.
|
|
//
|
|
// This one is dangerous and is meant to be used rarely. Moving the Stack
|
|
// under a running program abandons every return address on it, so a RET
|
|
// after this goes wherever the new Stack happens to say.
|
|
//
|
|
// It exists because a system that runs other programs has no other way to
|
|
// get its Stack back. A program that gives up part way through leaves
|
|
// whatever it pushed behind, and the interrupt frame that carried the
|
|
// request to stop is on there too. Without this the Stack only ever grows
|
|
// downward, one abandoned program at a time, and a shell cannot outlive
|
|
// many of them.
|
|
uint16_t *source = selectDataPointer(cpu);
|
|
cpu->StackPointer = *source;
|
|
}
|
|
break;
|
|
//
|
|
// Dx - Output Operations:
|
|
//
|
|
case 0xD0: {
|
|
// OUTQ - Write the value of Q to an output port.
|
|
uint16_t site = cpu->ProgramCounter;
|
|
cpu->ProgramCounter++;
|
|
OutputHandler(cpu->Q, cpu->Program[cpu->ProgramCounter]);
|
|
answerRefusal(cpu, site);
|
|
}
|
|
break;
|
|
case 0xD1: {
|
|
// OUTA - Write the value of A to an output port.
|
|
uint16_t site = cpu->ProgramCounter;
|
|
cpu->ProgramCounter++;
|
|
OutputHandler(cpu->A, cpu->Program[cpu->ProgramCounter]);
|
|
answerRefusal(cpu, site);
|
|
}
|
|
break;
|
|
case 0xD2: {
|
|
// OUTB - Write the value of B to an output port.
|
|
uint16_t site = cpu->ProgramCounter;
|
|
cpu->ProgramCounter++;
|
|
OutputHandler(cpu->B, cpu->Program[cpu->ProgramCounter]);
|
|
answerRefusal(cpu, site);
|
|
}
|
|
break;
|
|
//
|
|
// Ex - Input Operations:
|
|
//
|
|
case 0xE0: {
|
|
// INA - Read an Input to A.
|
|
uint16_t site = cpu->ProgramCounter;
|
|
cpu->ProgramCounter++;
|
|
cpu->A = InputHandler(cpu->Program[cpu->ProgramCounter]);
|
|
answerRefusal(cpu, site);
|
|
}
|
|
break;
|
|
case 0xE1: {
|
|
// INB - Read an Input to B.
|
|
uint16_t site = cpu->ProgramCounter;
|
|
cpu->ProgramCounter++;
|
|
cpu->B = InputHandler(cpu->Program[cpu->ProgramCounter]);
|
|
answerRefusal(cpu, site);
|
|
}
|
|
break;
|
|
//
|
|
// Fx - Special Operations:
|
|
//
|
|
case 0xF0:
|
|
// NOP - Do nothing.
|
|
break;
|
|
case 0xFF:
|
|
// HALT - Set the Halt Bit of the Status Register.
|
|
cpu->Status |= STATUS_HALT;
|
|
break;
|
|
default:
|
|
// Unknown Instruction.
|
|
return 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
void stepCPU(CPURegisters *cpu) {
|
|
if (!(cpu->Status & STATUS_HALT)) {
|
|
// Devices get their moment before the lines are read, and unconditionally: a
|
|
// device is entitled to notice something whether or not the CPU is currently
|
|
// willing to be interrupted about it. Masking decides when a request is answered,
|
|
// not whether the outside world is allowed to have happened.
|
|
serviceDevices();
|
|
// A device asking for attention is answered between instructions and never
|
|
// inside one, so the address that goes into the frame is always the start of an
|
|
// instruction and RETI always lands somewhere meaningful.
|
|
//
|
|
// A line that is up while the Interrupt Flag is clear stays up. Masking holds a
|
|
// device off; it does not lose what the device was asking for.
|
|
if (cpu->Status & STATUS_INTERRUPT) {
|
|
int port = nextPendingInterrupt();
|
|
if (port >= 0) {
|
|
clearInterrupt((uint8_t)port);
|
|
if (enterInterrupt(cpu, HARDWARE_VECTOR_BASE, (uint8_t)port, cpu->ProgramCounter)) {
|
|
// The device asked and nobody was listening. enterInterrupt has
|
|
// already stopped the machine; correct the cause, because the empty
|
|
// entry is in the hardware table rather than the software one.
|
|
cpu->Fault = FAULT_NO_DEVICE_HANDLER;
|
|
return;
|
|
}
|
|
// Entering the handler is what this cycle did, so no instruction runs.
|
|
// The step puts the Program Counter on the handler's first byte, the
|
|
// same way it does everywhere else.
|
|
cpu->ProgramCounter++;
|
|
return;
|
|
}
|
|
}
|
|
// The CPU is not halted, so do a cycle.
|
|
if (executeOperation(cpu->Program[cpu->ProgramCounter], cpu)) {
|
|
// Nothing decodes that byte. Hand it to the fault vector, which gets the
|
|
// address of the offending byte itself rather than the one after it, so
|
|
// that a handler can read the byte that failed and say what it was.
|
|
//
|
|
// A handler returning with a bare RETI will therefore meet the same byte
|
|
// again. That is the documented behaviour: resuming past a fault means
|
|
// deciding where to resume, which is the handler's business and not the
|
|
// CPU's guess.
|
|
uint16_t faultingAddress = cpu->ProgramCounter;
|
|
if (enterInterrupt(cpu, SOFTWARE_VECTOR_BASE, VECTOR_INVALID_OPCODE, faultingAddress)) {
|
|
// Nothing is installed, so stop where we are. The Program Counter is
|
|
// still on the offending byte, which is what the report wants. The
|
|
// cause is the byte, not the empty vector, so say so.
|
|
cpu->Fault = FAULT_BAD_OPCODE;
|
|
return;
|
|
}
|
|
// Dispatched. Fall through, so the step below lands on the handler.
|
|
}
|
|
cpu->ProgramCounter++;
|
|
}
|
|
}
|