AnachronautandClaude Opus 5
f1e5cc46f6
cycleCount used to tick once per instruction, so RSTA cost what SETD cost and a CALL moving ten bytes of Stack cost what a branch cost. No machine anybody could build works that way, and the emulator's job is to be the thing the hardware is designed against. Every touch of memory now goes through one of four accessors that charge for it: fetching an opcode, fetching the bytes after it, reading or writing Data Memory, and reaching a device port. One access, one cycle, nothing overlapped. The accessors exist so the cost is counted where the access happens rather than in a table of per instruction costs kept somewhere else - a table like that is a second copy of what the code does, and the two drift. The run loop spends a budget of cycles instead of running a count of instructions, so the emulated rate means something: an instruction costs what it touches, and a batch ends when the cycles are gone. What the numbers say now: RSTA 1 and SETD 4, being one byte and four. LDA 3, DPUA 2. CALL and RET together 24, RCAL and RRET together 8, because the first pair moves twenty bytes of Stack and the second moves four. The average SplitBit instruction costs 3.72 of these, measured over the native assembler assembling a program. And the measurement that prompted all of this: converting the filesystem's hottest leaf routine to RCAL is 3.1 per cent cheaper on a directory heavy workload. The old model said 0.0, which is what a model that cannot see memory traffic must say about a change that is nothing else. Three tests moved. settle() strips the cycle count from recorded output, so nothing should have churned - but it was anchored to the start of a line and replCalculator's last output has no newline on it, which leaves the halt message mid line where the pattern never reached. Not anchored any more. The two Life programs are bounded by a cycle count because they never end, and that number was rescaled from 3,000,000 to 11,200,000 - the same amount of work at 3.72 cycles to the instruction. Nothing about either program changed. No limit reproduces the old output exactly, because the cut now lands elsewhere in a frame, so they are recorded again rather than tuned to match. Whether hardware overlaps a fetch with the end of the previous instruction is left open on purpose. This is the conservative model; pipelining is a decision to make while drawing the hardware, not one to inherit from an emulator. Co-Authored-By: Claude Opus 5 <noreply@anthropic.com> Claude-Session: https://claude.ai/code/session_01E2JrLzFvuFX9fgi1LDRjrW
90 lines
4.0 KiB
C
90 lines
4.0 KiB
C
// cpu.h
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// SplitBit CPU Emulator Core
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// Written by Anachronaut
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// 10/16/2024
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#ifndef CPU_H
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#define CPU_H
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#include <stdint.h>
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// How many Data Pointers the CPU has. The instructions that name one take a full
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// byte to do it, so the encoding would allow up to 256. The limit here is the size
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// of the register file and the cost of saving pointers across a CALL, not the
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// instruction format. Must be a power of two, so that the selector can be masked
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// down to a valid pointer.
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#define DATA_POINTERS 4
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// How many Data Pointers survive a CALL. The low numbered pointers are saved and
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// restored around a subroutine; the rest are left alone, so a subroutine can use
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// one to hand a pointer back to its caller the way Q hands back a byte. This is
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// deliberately independent of DATA_POINTERS: adding more pointers should not make
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// every CALL more expensive.
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#define PRESERVED_DATA_POINTERS 3
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#if PRESERVED_DATA_POINTERS > DATA_POINTERS
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#error "Cannot preserve more Data Pointers than the CPU has."
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#endif
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// The bits of the Status register that mean something.
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#define STATUS_CARRY 0x01 // An arithmetic result carried out of, or borrowed into, a byte.
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#define STATUS_FAULT 0x02 // The CPU met a byte it could not decode, and stopped.
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#define STATUS_INTERRUPT 0x04 // Hardware interrupts are enabled. Nothing reads this yet.
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#define STATUS_HALT 0x80 // Execution has stopped, either from HALT or from a fault.
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// What an interrupt puts on the Stack: the resume address, every Data Pointer, and
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// every register the CPU has. The CALL frame leaves Q and DP3 alone, but that is a
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// convention between a caller and the subroutine it called. An interrupt arrives in
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// code that never agreed to give anything up, so it saves the lot.
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#define INTERRUPT_FRAME_BYTES (2 + DATA_POINTERS * 2 + 4)
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// Why the CPU stopped, when the Fault Flag is set. This is not something a program can
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// read, and it is deliberately not a register: when a handler is installed, the vector
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// it arrived through already says what happened, which is why the ISA has no fault
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// cause. This exists for the case where nothing is installed and the machine is dead,
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// so that whatever examines the wreckage can say something better than "it stopped".
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typedef enum {
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FAULT_NONE = 0,
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FAULT_BAD_OPCODE, // A byte that does not decode to an instruction.
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FAULT_NO_HANDLER, // Dispatched through a software vector with nothing in it.
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FAULT_NO_DEVICE_HANDLER, // A device interrupted, and its vector was empty.
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FAULT_DEVICE_REFUSED // A device refused, and nothing was installed to catch it.
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} FaultCause;
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// The struct containing the CPU registers.
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typedef struct {
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uint8_t A;
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uint8_t B;
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uint8_t Q;
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uint8_t Status;
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uint16_t ProgramCounter;
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uint16_t DataPointer[DATA_POINTERS];
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uint16_t StackPointer;
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uint8_t *Program;
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uint8_t *Data;
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// ---- What the machine has cost so far ----
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//
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// ONE BUS ACCESS IS ONE CYCLE, and every access goes through it: fetching an opcode,
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// fetching the bytes after it, reading or writing Data Memory, pushing or popping the
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// Stack, and reaching a device port. Nothing is overlapped - no fetching the next
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// instruction while this one finishes - because that is a thing hardware may or may
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// not do and this is the model to design against before deciding.
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//
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// It replaces counting instructions. Counting instructions said an RSTA and a SETD
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// cost the same, and that a CALL moving ten bytes of Stack cost what a branch costs,
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// which is not true of any machine anybody could build.
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unsigned long busCycles;
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// Set alongside the Fault Flag, and read only by whatever reports the stop.
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uint8_t Fault; // A FaultCause.
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uint8_t FaultVector; // Which vector was empty, when Fault is FAULT_NO_HANDLER.
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} CPURegisters;
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uint8_t executeOperation(uint8_t instruction, CPURegisters *cpu);
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void initializeCPU(CPURegisters *cpu, uint8_t *programMemory, uint8_t *dataMemory);
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void stepCPU(CPURegisters *cpu);
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#endif // CPU_H
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